The present application relates generally to capacitive devices that may be used in an electric circuit. More specifically, the disclosure relates to a device comprising chalcogenide material and uses for the chalcogenide based device within a circuit, such as, for example, a Dynamic Random Access Memory (DRAM) circuit and/or a power related circuit.
Devices that comprise chalcogenide materials have previously been used in electric circuits. The tunnel diode exhibits a number of interesting attributes, such as fast switching and differential negative resistance (“DNR”) (sometimes alternatively referred to as negative differential resistance or NDR). The tunnel diodes typically employ a quantum mechanical effect called the tunnel effect, which may be characterized by a non-ohmic behavior, such as by a non-linear current-voltage (I-V) curve.
Generally, ohmic devices, as opposed to non-ohmic devices, can be described by Ohm's law, V=IR, which states that current through a device is directly proportional to the voltage across the device. Thus, regarding an ohmic device, a larger current is seen through the ohmic device when a larger voltage is applied across the device. Typically, the I-V curve of an ohmic device shows a curve starting at the zero points of both voltage and current, with the curve increasing from the bottom left toward the top right of the graph, and showing consistently increasing current with increasing voltage. By contrast, the I-V curve of a device exhibiting DNR will show a rise from the zero points of voltage and current, to a peak, then a decrease from that peak, showing a decrease in current as the voltage continues to increase.
U.S. Pat. No. 7,015,494 (“the '494 patent”), to Campbell, describes an assembly comprising a chalcogenide material. The assembly demonstrates DNR and may be used for a device such as a tunnel diode. The '494 patent is incorporated herein, in its entirety, by reference.
Generally, DRAM circuits use a capacitive memory element to a store charge, which may be used to indicate a binary value. Large banks of capacitive charge containers are used in modern DRAM circuits and are closely spaced when fabricated. The containers are packed together to minimize the footprint of the capacitor, increasing the memory density per area. An increase in memory density, such as with a die shrink, typically equates to a reduced cost per bit of memory. Containers with large aspect ratios have been developed as DRAM microchips are reduced in size to fit more containers into the same area, or to fit the same number into a reduced area. Used in this application, the aspect ratio of a container is the ratio of the height to the diameter of the container. Thus, a container with a large aspect ratio is one with a large height relative to a diameter. Containers with large aspect ratios are typically more difficult to fabricate than containers with small aspect ratios. Further, a large aspect ratio may prevent the application of materials to, as well as the removal of debris from, the bottom of a container. DRAM microchips may benefit from the replacement of containers with a new technology.
U.S. Pat. No. 7,050,327, to Campbell (“the '327 patent”), discloses a device, and the fabrication of the device, that may be used as a memory cell. The '327 patent is incorporated herein, in its entirety, by reference. The device disclosed in the '327 patent demonstrates DNR and has a variable electric current characteristic. For example, the electric current measurable through the device when measured at a specific reading voltage, such as at 0.26V, can be changed by applying voltages within a certain range, such as within the range of 0.36V to 0.55V. The change in measurable electric current at the specific reading voltage is substantially persistent. Thus, a value can be stored in the device as a readable electric current value.
Changing a readable electric current value through a device diverges from the design of many types of DRAM, which generally use the aforementioned capacitive charge containers to store charge. Modern DRAM circuits use a measurement device, such as a sense amplifier, to measure the charge of a capacitive charge container. As such, non-capacitive memory devices may not be compatible with DRAM circuits, as they are currently designed.
The present disclosure is directed toward overcoming, or at least reducing the effects of one or more of the issues set forth above.